An analogue to digital converter (ADC) uses a clocked comparator made of two pre-amplifier stages and a latch with the following parameters:
1st stage pre-amplifier: NRMS = 26 µVRMS, Gain: 26 dB
2nd stage pre-amplifier: NRMS = 300 µVRMS, Gain: 20 dB
Latch: NRMS = 740 µVRMS
The quoted noise voltage is referred to the input of each stage and not the input of the comparator.
Calculate the maximum effective number of bits (ENOB) that can be achieved by the ADC (without oversampling), considering that the peak-to-peak input voltage range is 2 VPP.