Use structural modelling style to design a 4-bit ripple carry adder (RCA4). Simulate the design to
verify for design correctness.
X3
Y3
X2
Y2
X1
Y1
X0
Y0
RCA4
FA
FA
FA
FA
A
B
A
B
A
B
A
B
C3
C2
C1
Cin
Cout Cin
Sum
Cout Cin
Sum
Cout Cin
Sum
Cin
Cout
Sum3
Sum2
Sum1
Sum0
Cout
Fig. 2-7: 4-bit ripple carry adder
Design
// Verilog-1995
module RCA4 (Cin, x, y, Cout, Sum);
input Cin; input [3:0] x, y;
output [3:0] Sum; output Cout;
wire c1, c2, c3;
FA u0 (.Cin(Cin), A(x[0]), B(y[0]), Sum(Sum[0]), Cout(c1));
FA u1 (.Cin(c1), A(x[1]), B(y[1]), Sum(Sum[1]), Cout(c2));
FA u2 (.Cin(c2), A(x[2]), B(y[2]), Sum(Sum[2]), Cout(c3));
FA u3 (.Cin(c3), A(x[3]), B(y[3]), Sum(Sum[3]), Cout(Cout));
endmodule
Please write a testbench and design coding for EDA Playground
