How can "race condition" happen? Show "how" using an example in assembly instructions.
Added by Matthew K.
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The final outcome depends on the timing of their execution, which can lead to unpredictable results. Show more…
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A race condition occurs when two or more threads can access shared data and they try to change it concurrently. Because the kernel can swap between threads at any time, you don't know the order in which the threads will attempt to access the shared data. In the following, we will create a program that stores a global variable, global, initialized to 0.We also create two pThreads that attempt to access the shared variable. thread1 is a thread that increments global 90,000,000 times, while thread2 concurrently decrements global the same number of times. 1. What is the expected value of global when both threads have finished executing?
Akash M.
[20/20/20/20] <5.5> The spin lock is the simplest synchronization mechanism possible on most commercial shared-memory machines. This spin lock relies on the exchange primitive to atomically load the old value and store a new value. The lock routine performs the exchange operation repeatedly until it finds the lock unlocked (i.e., the returned value is 0). addi x2, x0, #1 lockit: EXCH x2, 0(x1) bnez x2, lockit The lock is released simply by storing a 0 into x2. As discussed in Section 5.5, the more optimized spin lock employs cache coherence and uses a load to check the lock, allowing it to spin with a shared var- iable in the cache. lockit: ld x2, 0(x1) bnez x2, lockit addi x2, x0, #1 EXCH x2, 0(x1) bnez x2, lockit Assume that processor cores C0, C1, and C3 are all trying to acquire a lock at address 0xAC00 (i.e., register R1 holds the value 0xAC00). Assume the cache con- tents from Figure 5.37 and the timing parameters from Implementation 1 in Figure 5.38. For simplicity, assume the critical sections are 1000 cycles long. a. [20] <5.5> Using the simple spin lock, determine approximately how many memory stall cycles each processor incurs before acquiring the lock. b. [20] <5.5> Using the optimized spin lock, determine approximately how many memory stall cycles each processor incurs before acquiring the lock. c. [20] <5.5> Using the simple spin lock, approximately how many memory accesses occur? d. [20] <5.5> Using the optimized spin lock, approximately how many memory accesses occur?
Adi S.
What are some examples of how a pipelining bug led to unexpected behaviors in computer usage and/or design? Describe what happened, and explain how it was resolved.
Supreeta N.
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